feat(minimaxm3-fp4-b200-dynamo-vllm): bump vLLM nightly to 5e35a6f4, enable cutlass MSA decode / 更新 minimaxm3-fp4-b200-dynamo-vllm vLLM 镜像至 5e35a6f4,启用 cutlass MSA 解码后端 - #2472
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…enable cutlass MSA decode backend 中文:将 minimaxm3-fp4-b200-dynamo-vllm vLLM 镜像升级至 nightly-5e35a6f4f9bbc217c599692157ca985c894373f7,更新 B200 FP4 所有 8k1k recipe YAML 中的 container 字段,并在 prefill/decode 环境中启用 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass
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Thanks for the contribution! Please reach out to respective companies' CODEOWNER to fill in the latest PR_REVIEW_CHECKLIST.md before pinging core maintainer on Slack for review. In order for the signoff PR check bot to trigger, you must follow the PR_REVIEW_CHECKLIST.md template correctly, including the phrase For PR verification, add the PR authors are responsible for ensuring that after merging, all GitHub Action jobs fully pass. A lot of the time, failures are just flakes and simply re-running the failed jobs will fix it. See GitHub's docs on re-running failed jobs 感谢你的贡献!请联系相应公司的 CODEOWNER 填写最新的 PR_REVIEW_CHECKLIST.md,然后再在 Slack 上联系核心维护者进行审阅。为了触发 signoff PR 检查机器人,你必须正确遵循 PR_REVIEW_CHECKLIST.md 模板,包括保留英文语句 如需进行 PR 验证,请为此 PR 添加 PR 作者有责任确保合并后所有 GitHub Action 任务完全通过。 很多时候失败只是偶发抖动(flake),重新运行失败的任务即可解决。参见 GitHub 关于重新运行失败任务的文档 |
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LGTM — mechanical vLLM image bump and env-var addition applied consistently.
Extended reasoning...
Overview
This PR bumps the minimaxm3-fp4-b200-dynamo-vllm vLLM nightly image from 4080263b to 5e35a6f4 (a fixed-len MiniMax-M3 fix) and adds VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass to the prefill/decode environments across the 6 B200 FP4 8k1k recipe YAMLs, configs/nvidia-master.yaml, and a matching perf-changelog.yaml entry.
Security risks
None. This only changes a container image tag pin and an inference-engine environment variable for a benchmark recipe; no code paths, auth, or secrets are touched.
Level of scrutiny
Low. This is the standard image-bump pattern used repeatedly in this repo (config/version bump + changelog entry), self-contained to benchmark config files with no logic changes.
Other factors
I verified all 6 recipe files consistently updated both the container tag and the new env var in both prefill and decode blocks, and that configs/nvidia-master.yaml and perf-changelog.yaml were updated to match. The bug hunting system found no issues, and the one candidate (missing changelog entry) was already ruled out as the entry is present. The PR's own test plan (full-sweep-fail-fast) will validate the change empirically.
…prefill (no cudagraph) 中文:从预填充环境中移除 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass(预填充工作进程不使用 CUDA graph)
…utlass MSA decode, not env var 中文:将 decode_environment 中的 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND 替换为解码侧 attention-config JSON 中的 minimax_m3_msa_decode_backend 字段
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=30824020747 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=30828238642 |
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/reuse-sweep-run |
kedarpotdar-nv
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As a PR reviewer and CODEOWNER, I have reviewed this and have:
- Verified that as of the moment of typing this, this is the latest version of PR_REVIEW_CHECKLIST.md
- Verified that the general code quality meets the InferenceX standard and does not make the code quality any worse.
- Verified that this PR has passed PR validation. Run Sweep 30828238642, attempt 1
- Verified that this PR passes evals. Run Sweep 30828238642, attempt 1
- Verified that speculative decoding PRs uses chat templates to align the AL distribution to real world
- For agentic workloads: verified that speculative-decoding configs (EAGLE / MTP / draft models) run with simulated synthetic acceptance, with the acceptance-length value taken from the committed golden AL curve in golden_al_distribution/ for that model, thinking mode, and draft length. A submission may choose any supported draft length, but it may not substitute a different acceptance target.
- Verified that the model architecture isn't changed with benchmark hacks like using --hf-overrides to skipping indexer for every x layers on models that don't natively support this. As a general rule, we won't accept optimizations that reduces the number of model architecture FLOPs. Anything that makes that same computation run faster is fair game; FLOPs at lower precisions is fine, given that the config passes private evals. As an general north star princple, we should only use optimizations which is used in production by customers that care about accuracy
- If an company claims that they support vLLM/SGLang as first class LLM inference engines on their hardware, I have verified that the respective vLLM submission made using upstream https://hub.docker.com/u/vllm docker repo, upstream SGLang https://hub.docker.com/u/lmsysorg docker repo. The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet as supported by vLLM/SGLang community maintainers
- If an company claims that they support vLLM/SGLang as first class upstream in-tree LLM inference engines on their hardware, I have have verified that the respective vLLM/SGLang submission has been made before additional frameworks (TRT-LLM, ATOM, etc.). The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet.
- Verified that every single-node vLLM/SGLang recipe in this PR is documented in the official vLLM recipes and/or the SGLang cookbook:
- I linked the corresponding upstream PR in the vLLM recipe repo or SGLang repo and verified that it is MERGED before this InferenceX PR merges. An opened, draft, or closed-without-merge upstream PR does not satisfy this requirement. If the matching recipe was already published, I linked the published recipe/cookbook page in the additional detail section below.
- Verified that this PR does not patch the inference engine or serving stack — the pinned image must run as shipped. This covers .patch files / git apply / patch, inline patches embedded in benchmark scripts (e.g. a python3/sed heredoc that rewrites installed engine sources before serving), in-place edits of site-packages, monkey-patching, overwriting container files, and installing forked/rebuilt engine wheels on top of the pinned image. The only exception is a patch covered by a filled-out waiver at docs/waiver/
<PR_NUMBER>.md— named after the PR that introduces the patch and filed in that same PR, stating what is patched, why the unmodified upstream image cannot run this benchmark, the upstream PR/issue link, and the removal plan — which I have linked below in the additional detail section. - If any of the above criteria cannot reasonably be satisfied, I have provided additional reasoning below.
Additional detail section:
- Scope: multi-node disaggregated STP only; speculative decoding, Agentic golden-AL, and single-node recipe requirements are not applicable.
- Exact-head evidence: Run Sweep 30828238642, attempt 1 ran on
f4bf44a8f14e51d008f44604ef28c26233ebca5f; all 6 selected throughput jobs and all 6 selected eval jobs passed. The throughput aggregate contains 9 result points because the lowest-concurrency topology coversc1/c4/c8/c16. GSM8K scores were0.952995–0.958302, above the0.90threshold, using the upstreamvllm/vllm-openai:nightly-5e35a6f4f9bbc217c599692157ca985c894373f7image. - All 6 referenced B200 FP4 recipe files pin the same image and set
minimax_m3_msa_decode_backend: cutlassin the decode-sideattention-config. This PR introduces no FLOP-reducing, speculative-decoding, Agentic, or inference-engine patching changes. - Accepted non-functional documentation nit: the PR summary and new
perf-changelog.yamldescription still describe the supersededVLLM_MINIMAX_M3_MSA_DECODE_BACKENDprefill/decode environment-variable approach. The final runnable configuration consistently uses the decode-sideattention-configfield instead. - Accepted mergeability caveat: current
mainconflicts with this head only in the append-onlyperf-changelog.yaml; approval does not resolve that conflict. - Existing authorized reuse command: #2472 (comment)
Signed: kedarpotdar-nv
中文:解决仅追加性能变更日志的合并冲突。
❌❌❌ REJECTED ❌❌❌@kedarpotdar-nv — two blockers: the sign-off uses a stale checklist template (it is missing the MODELS.md deprecation item added in #2482), and this PR modifies MiniMax-M3 single-turn 8k1k recipes — a model-scenario combination MODELS.md deprecates after 2026-08-03 (review date: 2026-08-04). ✅ Check 0 (CODEOWNER): PASS — |
…enable cutlass MSA decode / 更新 minimaxm3-fp4-b200-dynamo-vllm vLLM 镜像至 5e35a6f4,启用 cutlass MSA 解码后端 (#2472) * feat(minimaxm3-fp4-b200-dynamo-vllm): bump vLLM nightly to 5e35a6f4, enable cutlass MSA decode backend 中文:将 minimaxm3-fp4-b200-dynamo-vllm vLLM 镜像升级至 nightly-5e35a6f4f9bbc217c599692157ca985c894373f7,更新 B200 FP4 所有 8k1k recipe YAML 中的 container 字段,并在 prefill/decode 环境中启用 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass * chore(perf-changelog): add entry for minimaxm3-fp4-b200-dynamo-vllm nightly bump PR #2472 * fix(minimaxm3-fp4-b200-dynamo-vllm): remove cutlass MSA env var from prefill (no cudagraph) 中文:从预填充环境中移除 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass(预填充工作进程不使用 CUDA graph) * fix(minimaxm3-fp4-b200-dynamo-vllm): use attention_config field for cutlass MSA decode, not env var 中文:将 decode_environment 中的 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND 替换为解码侧 attention-config JSON 中的 minimax_m3_msa_decode_backend 字段 --------- Co-authored-by: adibarra <93070681+adibarra@users.noreply.github.com>
Summary
minimaxm3-fp4-b200-dynamo-vllmvLLM image tonightly-5e35a6f4f9bbc217c599692157ca985c894373f7(contains fixed-len MiniMax-M3 fix)model.containerand addVLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlassto prefill and decode environmentsTest plan
full-sweep-fail-fastlabel runs green中文说明
minimaxm3-fp4-b200-dynamo-vllmvLLM 镜像升级至nightly-5e35a6f4f9bbc217c599692157ca985c894373f7model.container字段,并在预填充与解码环境中添加VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass🤖 Generated with Claude Code